a) Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a technique allowing a semiconductor integrated circuit to reliably operate at a low voltage.
b) Description of the Related Art
In connecting a region in a semiconductor substrate to a wiring formed on the substrate, a highly doped region is generally formed in the surface of the substrate, and thereafter a wiring is connected to the surface of the highly doped region. As the material of wiring, metal, silicide, doped silicon, and other materials are used.
If a wiring is made of polycrystalline silicon or amorphous silicon, a simplified connection structure may be adopted. Specifically, a silicon electrode is first formed on the surface of a semiconductor substrate, and thereafter ions are implanted in the silicon electrode and semiconductor substrate adjacent thereto. The doped silicon electrode and doped region of the substrate contact slightly at the interface therebetween. Heat treatment at the later process diffuses impurities in the doped silicon electrode and substrate region toward the non-doped region under the silicon electrode, and electrical interconnect therebetween is established.
The above processes are advantageous in that they can be performed at the same time when a gate of a MOS transistor is formed and then ions are implanted to the source and drain regions.
Recent semiconductor integrated circuits with very fine patterns have a demand for a low voltage operation of the circuits. As the operating voltage lowers, a voltage difference between high and low levels (logic swing) becomes small and the circuit operation becomes likely to become unstable.
A circuit may become unstable at a low voltage such as 3 V or 3.3 V even if it operates stably at an operating voltage of 5 V.